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 White Electronic Designs
FEATURES
Access Times of 35ns (SRAM) and 70ns (FLASH) Access Times of 70ns (SRAM) and 120ns (FLASH) Packaging * 66-pin, PGA Type, 1.075 inch square HIP, Hermetic Ceramic HIP (Package 400) * 66-pin, PGA Type, 1.185 inch square HIP, Hermetic Ceramic HIP (Package 401) * 68 lead, Hermetic CQFP (G1U)1, 22.4mm (0.880 inch) square (Package 519). Designed to fit JEDEC 68 lead 0.990" CQFJ footprint (FIGURE 2) * 68 lead, Hermetic CQFP (G1T), 22.4mm (0.880 inch) square (Package 524) 128Kx16 SRAM 128Kx16 5V FLASH Organized as 128Kx16 of SRAM and 128Kx16 of Flash Memory with separate Data Buses Both blocks of memory are User Configurable as 256Kx8 Low Power CMOS Commercial, Industrial and Military Temperature Ranges
WSF128K16-XXX
128Kx16 SRAM/FLASH MODULE, SMD 5962-96900
TTL Compatible Inputs and Outputs Built-in Decoupling Caps and Multiple Ground Pins for Low Noise Operation Weight * WSF128K16-XHX -- 13 grams typical * WSF128K16-H1X -- 13 grams typical * WSF128K16-XG1UX1 -- 5 grams typical * WSF128K16-XG1TX -- 5 grams typical
FLASH MEMORY FEATURES
10,000 Erase/Program Cycles Sector Architecture * 8 equal size sectors of 16K bytes each * Any combination of sectors can be concurrently erased. Also supports full chip erase 5 Volt Programming; 5V 10% Supply Embedded Erase and Program Algorithms Hardware Write Protection Page Program Operation and Internal Program Control Time.
Note: For programming information refer to Flash Programming 1M5 Application Note. Note 1: Package not recommended for new designs
FIGURE1 PIN CONFIGURATION FOR WSF128K16-XHX AND WSF128K16-XH1X Top View
1 SD8 SD9 SD10 A13 A14 A15 A16 NC SD0 SD1 SD2 11 22 12 SWE2# SCS2# GND SD11 A10 A11 A12 VCC SCS1# NC SD3 33 23 SD15 SD14 SD13 SD12 OE# NC SWE1# SD7 SD6 SD5 SD4 FD8 FD9 FD10 A6 A7 NC A8 A9 FD0 FD1 FD2 44 34 VCC FCS2# FWE2# FD11 A3 A4 A5 FWE1# FCS1# GND FD3 55 45 FD15 FD14 FD13 FD12 A0 A1 A2 FD7 FD6 FD5 FD4 66
OE# A0-16 128K x 8 SRAM 128K x 8 SRAM 128K x 8 FLASH 128K x 8 FLASH
Pin Description
56
FD0-15 SD0-15 A0-16 SWE1-2# SCS1-2# OE# VCC GND NC FWE1-2# FCS1-2#
Flash Data Inputs/Outputs SRAM Data Inputs/Outputs Address Inputs SRAM Write Enable SRAM Chip Selects Output Enable Power Supply Ground Not Connected Flash Write Enable Flash Chip Select
Block Diagram
S W E 1 # S CS1# S W E 2 # S CS2# F W E 1 # F CS1# F W E 2 # F CS2#
8
8
8
8
SD0-7
SD8-15
FD0-7
FD8-15
White Electronic Designs Corp. reserves the right to change products or specifications without notice. May 2003 Rev. 6 1 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
WSF128K16-XXX
FIGURE 2 - PIN CONFIGURATION FOR WSF128K16-XG1UX1, WSF128K16-XG1TX
Top View
NC A0 A1 A2 A3 A4 A5 FCS3# GND FCS4# SWE1# A6 A7 A8 A9 A10 VCC
Pin Description
FD0-15 SD0-15 A0-16
FD0 FD1 FD2 FD3 FD4 FD5 FD6 FD7 GND FD8 FD9 FD10 FD11 FD12 FD13 FD14 FD15
Flash Data Inputs/Outputs SRAM Data Inputs/Outputs Address Inputs SRAM Write Enable SRAM Chip Selects Output Enable Power Supply Ground Not Connected Flash Write Enable Flash Chip Select
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 GND SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
SWE1-2# SCS1-2# OE# VCC GND NC FWE1-2# FCS1-2#
Block Diagram
S W E 1 # S CS1# OE# A0-16 128K x 8 SRAM 128K x 8 SRAM 128K x 8 FLASH 128K x 8 FLASH S W E 2 # S CS2# F W E 1 # F CS1# F W E 2 # F CS2#
SCS1# OE# SCS2#
NC SWE2# FWE3# FWE4#
A11
A12
A13
A14
NC
NC
VCC
NC NC NC
8
8
8
8
SD0-7
SD8-15
FD0-7
FD8-15
NOTE 1: Package not recommended for new designs
White Electronic Designs Corp. reserves the right to change products or specifications without notice. May 2003 Rev. 6 2 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
Parameter Symbol Operating Temperature TA Storage Temperature TSTG Signal Voltage Relative to GND VG Junction Temperature TJ Supply Voltage VCC Parameter Flash Data Retention Flash Endurance (write/erase cycles) Min -55 -65 -0.5 -0.5 Max +125 +150 7.0 150 7.0 Unit C C V C V SCS# H L L L OE# X L H X SWE# X H H L
WSF128K16-XXX
SRAM TRUTH TABLE
Mode Standby Read Read Write Data I/O High Z Data Out High Z Data In Power Standby Active Active Active
CAPACITANCE
10 years 10,000 TA = +25C Test Symbol Condition Max Unit OE# Capacitance COE VIN = 0V, f = 1.0MHz 50 pF F/S WE1-2# Capacitance CWE VIN = 0V, f = 1.0MHz 20 pF F/S CS1-2# Capacitance CCS VIN = 0V, f = 1.0MHz 20 pF SD0-15/FD0-15 Capacitance CI/O VIN = 0V, f = 1.0MHz 20 pF A0 - A16 Capacitance CAD VIN = 0V, f = 1.0MHz 50 pF
This parameter is guaranteed by design but not tested.
NOTES: 1. Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability.
RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage Input High Voltage Input Low Voltage Symbol VCC VIH VIL Min 4.5 2.2 -0.5 Max 5.5 VCC + 0.3 +0.8 Unit V V V
DC CHARACTERISTICS
VCC = 5.0V, VSS = 0V, -55C TA +125C Parameter Input Leakage Current Output Leakage Current SRAM Operating Supply Current x 16 Mode Standby Current SRAM Output Low Voltage SRAM Output High Voltage Flash VCC Active Current for Read (1) Flash VCC Active Current for Program or Erase (2) Flash Output Low Voltage Flash Output High Voltage Flash Output High Voltage Flash Low VCC Lock Out Voltage Symbol ILI ILO ICCx16 ISB VOL VOH ICC1 ICC2 VOL VOH1 VOH2 VLKO Conditions VCC = 5.5, VIN = GND to VCC SCS# = VIH, OE# = VIH, VOUT = GND to VCC SCS# = VIL, OE# = FCS# = VIH, f = 5MHz, VCC = 5.5 FCS# = SCS# = VIH, OE# = VIH, f = 5MHz, VCC = 5.5 IOL = 2.1mA, VCC = 4.5 IOH = -1.0mA, VCC = 4.5 FCS# = VIL, OE# = SCS# = VIH FCS# = VIL, OE# = SCS# = VIH IOL = 8.0mA, VCC = 4.5 IOH = -2.5 mA, VCC = 4.5 IOH = -100 A, VCC = 4.5 Min Max 10 10 360 40 0.4 100 130 0.45 0.85 x VCC VCC -0.4 3.2 Unit A A mA mA V V mA mA V V V V
2.4
NOTES: 1. The ICC current listed includes both the DC operating current and the frequency dependent component (@ 5 MHz). The frequency component typically is less than 2 mA/MHz, with OE# at VIH. 2. ICC active while Embedded Algorithm (program or erase) is in progress. 3. DC test conditions: VIL = 0.3V, VIH = VCC - 0.3V
White Electronic Designs Corp. reserves the right to change products or specifications without notice. May 2003 Rev. 6 3 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
SRAM AC CHARACTERISTICS
VCC = 5.0V, -55C TA +125C Parameter Read Cycle Read Cycle Time Address Access Time Output Hold from Address Change Chip Select Access Time Output Enable to Output Valid Chip Select to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z Symbol tRC tAA tOH tACS tOE tCLZ1 tOLZ1 tCHZ1 tOHZ1 -35 -70 Unit ns ns ns ns ns ns ns ns ns Parameter Write Cycle Write Cycle Time Chip Select to End of Write Address Valid to End of Write Data Valid to End of Write Write Pulse Width Address Setup Time Address Hold Time Output Active from End of Write Write Enable to Output in High Z Data Hold from Write Time
WSF128K16-XXX
SRAM AC CHARACTERISTICS
VCC = 5.0V, -55C TA +125C Symbol tWC tCW tAW tDW tWP tAS tAH tOW1 tWHZ1 tDH -35 -70 Unit ns ns ns ns ns ns ns ns ns ns
Min Max Min Max 35 70 35 70 0 3 35 70 20 35 3 3 0 0 20 25 20 25
1. This parameter is guaranteed by design but not tested.
Min Max Min Max 35 70 25 60 25 60 20 30 25 50 0 5 0 5 4 5 20 25 0 0
1. This parameter is guaranteed by design but not tested.
FIGURE 3 AC Test Circuit
AC TEST CONDITIONS
Parameter Input Pulse Levels Input Rise and Fall Input and Output Reference Level Output Timing Reference Level Typ VIL = 0, VIH = 3.0 5 1.5 1.5 Unit V ns V V
Notes: VZ is programmable from -2V to +7V. IOL & IOH programmable from 0 to 16mA. Tester Impedance Z0 = 75. VZ is typically the midpoint of VOH and VOL. IOL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance.
White Electronic Designs Corp. reserves the right to change products or specifications without notice. May 2003 Rev. 6 4 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
WSF128K16-XXX
FIGURE 4 - SRAM TIMING WAVEFORM -- READ CYCLE
tRC
ADDRESS
tAA
tRC
ADDRESS
SCS#
tAA tOH
DATA I/O
PREVIOUS DATA VALID DATA VALID
tACS tCLZ
SOE#
tCHZ
READ CYCLE 1 (SCS# = OE# = VIL, SWE# = VIH)
tOE tOLZ
DATA I/O
HIGH IMPEDANCE
tOHZ
DATA VALID
READ CYCLE 2 (SWE# = VIH)
FIGURE 5 - SRAM WRITE CYCLE -- SWE# CONTROLLED
tWC
ADDRESS
tAW tCW
SCS#
tAH
tAS
SWE#
tWP tOW tWHZ tDW
DATA VALID
tDH
DATA I/O
WRITE CYCLE 1, SWE# CONTROLLED
FIGURE 6 - SRAM WRITE CYCLE -- SCS# CONTROLLED
tWC
ADDRESS
tAS
SCS#
tAW tCW
tAH
tWP
SWE#
tDW
DATA I/O
DATA VALID
tDH
WRITE CYCLE 2, SCS# CONTROLLED
White Electronic Designs Corp. reserves the right to change products or specifications without notice. May 2003 Rev. 6 5 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
VCC = 5.0V, -55C TA +125C Parameter Write Cycle Time Chip Select Setup Time Write Enable Pulse Width Address Setup Time Data Setup Time Data Hold Time Address Hold Time Chip Select Hold Time Write Enable Pulse Width High Duration of Byte Programming Operation (min) Chip and Sector Erase Time Read Recovery Time Before Write VCC Set-up Time Chip Programming Time Output Enable Setup Time Output Enable Hold Time (1)
1. For Toggle and Data# Polling.
WSF128K16-XXX
FLASH AC CHARACTERISTICS - WRITE/ERASE/PROGRAM OPERATIONS, FWE# CONTROLLED
Symbol tAVAV tELWL tWLWH tAVWL tDVWH tWHDX tWLAX tWHEH tWHWL tWHWH1 tWHWH2 tGHWL tWC tCS tWP tAS tDS tDH tAH tCH tWPH -70 Min 70 0 35 0 30 0 45 0 20 14 2.2 0 50 0 10 Max Min 120 0 50 0 50 0 50 0 20 14 2.2 0 50 0 10 -120 Max Unit ns ns ns ns ns ns ns ns ns s sec s s sec ns ns
60
60
tVCS tOES tOEH
12.5
12.5
FLASH AC CHARACTERISTICS - READ ONLY OPERATIONS
VCC = 5.0V, -55C TA +125C Parameter Read Cycle Time Address Access Time Chip Select Access Time OE# to Output Valid Chip Select to Output High Z (1) OE# High to Output High Z (1) Output Hold from Address, CS# or OE# Change, whichever is first
1. Guaranteed by design, not tested.
Symbol tAVAV tAVQV tELQV tGLQV tEHQZ tGHQZ tAXQX tRC tACC tCE tOE tDF tDF tOH
-70 Min 70 Max 70 70 35 20 20 0 0 Min 120
-120 Max 120 120 50 30 30
Unit ns ns ns ns ns ns ns
White Electronic Designs Corp. reserves the right to change products or specifications without notice. May 2003 Rev. 6 6 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
VCC = 5.0V, -55C TA +125C Parameter Write Cycle Time Fwe# Setup Time Fcs# Pulse Width Address Setup Time Data Setup Time Data Hold Time Address Hold Time Fwe# Hold From Fwe# High Fcs# Pulse Width High Duration Of Programming Operation Duration Of Erase Operation Read Recovery Before Write Chip Programming Time Symbol tAVAV tWLEL tELEH tAVEL tDVEH tEHDX tELAX tEHWH tEHEL tWHWH1 tWHWH2 tGHEL tWC tWS tCP tAS tDS tDH tAH tWH tCPH -70 Min 70 0 35 0 30 0 45 0 20 14 2.2 0
WSF128K16-XXX
FLASH AC CHARACTERISTICS - WRITE/ERASE/PROGRAM OPERATIONS, FCS# CONTROLLED
-120 Max Min 120 0 50 0 50 0 50 0 20 14 2.2 0 Max Unit ns ns ns ns ns ns ns ns ns s sec ns sec
60 12.5
60 12.5
White Electronic Designs Corp. reserves the right to change products or specifications without notice. May 2003 Rev. 6 7 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
WSF128K16-XXX
FIGURE 7 - AC WAVEFORMS FOR FLASH MEMORY READ OPERATIONS
tRC Addresses tACC FCS# tDF OE# tOE Addresses Stable
FWE#
tCE
tOH High Z
Outputs
High Z
Output Valid
White Electronic Designs Corp. reserves the right to change products or specifications without notice. May 2003 Rev. 6 8 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
WSF128K16-XXX
FIGURE 8 - WRITE/ERASE/PROGRAM OPERATION, FLASH MEMORY FWE# CONTROLLED
Data# Polling Addresses 5555H tWC FCS# tGHWL OE# tWP FWE# tCS tWPH tDH Data tDS tOH A0H PD tOE tDF tWHWH1 tAS PA tAH PA tRC
D7#
DOUT
5.0 V tCE
NOTES: 1. PA is the address of the memory location to be programmed. 2. PD is the data to be programmed at byte address. 3. D7# is the output of the complement of the data written to the device. 4. DOUT is the output of the data written to the device. 5. Figure indicates last two bus cycles of four bus cycle sequence.
White Electronic Designs Corp. reserves the right to change products or specifications without notice. May 2003 Rev. 6 9 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
WSF128K16-XXX
FIGURE 9 - AC WAVEFORMS CHIP/SECTOR ERASE OPERATIONS FOR FLASH MEMORY
tAS Addresses 5555H
tAH 2AAAH 5555H 5555H 2AAAH SA
FCS# tGHWL OE# tWP FWE# tWPH tCS Data tDS tDH
AAH
55H
80H
AAH
55H
10H/30H
VCC tVCS
Note: SA is the sector address for Sector Erase.
White Electronic Designs Corp. reserves the right to change products or specifications without notice. May 2003 Rev. 6 10 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
WSF128K16-XXX
FIGURE 10 - AC WAVEFORMS FOR DATA# POLLING DURING EMBEDDED ALGORITHM OPERATIONS FOR FLASH MEMORY
FCS#
tCH tDF tOE
OE# tOEH FWE#
tCE tOH D7 tWHWH 1 or 2 D0-D6 D0-D6 = Invalid tOE D7 tWHWH 1 or 2 D7 D7 Valid Data High Z D0-D7 Valid Data D7# D7 = Valid Data High Z
White Electronic Designs Corp. reserves the right to change products or specifications without notice. May 2003 Rev. 6 11 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
WSF128K16-XXX
FIGURE 11 - WRITE/ERASE/PROGRAM OPERATION FOR FLASH MEMORY, CS# CONTROLLED
Data# Polling Addresses 5555H tWC FWE# tGHEL OE# tCP FCS# tWS tWHWH1 tAS PA tAH PA
tCPH tDH
Data tDS
A0H
PD
D7#
DOUT
5.0 V
NOTES: 1. PA represents the address of the memory location to be programmed. 2. PD represents the data to be programmed at byte address. 3. D7# is the output of the complement of the data written to the device. 4. DOUT is the output of the data written to the device. 5. Figure indicates the last two bus cycles of a four bus cycle sequence.
White Electronic Designs Corp. reserves the right to change products or specifications without notice. May 2003 Rev. 6 12 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
WSF128K16-XXX
PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifications without notice. May 2003 Rev. 6 13 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
WSF128K16-XXX
PACKAGE 519: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G1U)1
NOTE 1: Package not recommended for new designs ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifications without notice. May 2003 Rev. 6 14 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
WSF128K16-XXX
PACKAGE 524: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G1T)
25.27 (0.995) 0.13 (0.005) SQ 23.88 (0.940) 0.25 (0.010) SQ
4.06 (0.160) MAX 0.25 (0.010) MAX
0.83 (0.033) 0.32 (0.013)
0.84 (0.033) REF
DETAIL A
1.27 (0.050) 0.38 (0.015) 0.05 (0.002) 20.3 (0.800) REF SEE DETAIL "A"
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifications without notice. May 2003 Rev. 6 15 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
ORDERING INFORMATION
W S F 128K16 - XXX X X X
LEAD FINISH: Blank = Gold plated leads A = Solder dip leads DEVICE GRADE: M = Military Screened I = Industrial C = Commercial
WSF128K16-XXX
-55C to +125C -40C to +85C 0C to +70C
PACKAGE TYPE: H1 = 1.075" sq. Ceramic Hex In-line Package, HIP (Package 400) H = 1.185" sq. Ceramic Hex In-line Package, HIP (Package 401) G1U = 22.4 mm Ceramic Quad Flat Pack, CQFP (Package 519) G1T = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 524) ACCESS TIME (ns) 37 = 35ns SRAM and 70ns FLASH 72 = 70ns SRAM and 120ns FLASH ORGANIZATION, 128K x 16 FLASH SRAM WHITE ELECTRONIC DESIGNS CORP.
DEVICE TYPE
128K x 16 Mixed Module 128K x 16 Mixed Module 128K x 16 Mixed Module
SRAM SPEED
70ns 70ns 70ns
FLASH SPEED
120ns 120ns 120ns
PACKAGE
66 pin HIP (H) 66 pin HIP (H1) 68 lead CQFP/J (G1U)
SMD NO.
5962-96900 01HXX 5962-96900 01HYX 5962-96900 01H9X
128K x 16 Mixed Module 128K x 16 Mixed Module 128K x 16 Mixed Module
35ns 35ns 35ns
70ns 70ns 70ns
66 pin HIP (H) 66 pin HIP (H1) 68 lead CQFP/J (G1U)
5962-96900 02HXX 5962-96900 02HYX 5962-96900 02H9X
White Electronic Designs Corp. reserves the right to change products or specifications without notice. May 2003 Rev. 6 16 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com


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